m2mb_spi_slave.h

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/*===============================================================================================*/
/*         >>> Copyright (C) Telit Communications S.p.A. Italy All Rights Reserved. <<<          */
/* Global declarations ==========================================================================*/
#ifndef  M2MB_SLAVE_SPI_API_H
#define  M2MB_SLAVE_SPI_API_H

/*-----------------------------------------------------------------------------------------------*/

/*-----------------------------------------------------------------------------------------------*/

/* Global typedefs ==============================================================================*/

#define M2MB_SLAVE_WRITE_DONE_EVT    (0x00000001)       
#define M2MB_SLAVE_INIT_DONE_EVT     (0x00000002)       
#define M2MB_SPI_SLAVE_RECEIVE_BUFFER_COUNT (12)        
#define M2MB_SPI_SLAVE_RECEIVE_BUFFER_SIZE  (1536)      
#define M2MB_NUM_BUFFERS_PER_MBOX    (12)                       
#define M2MB_SPI_SLAVE_WRITE_BUFFER_SIZE  (2048)        
#define M2MB_MBOX_BLOCK_SIZE   256                                      
#define M2MB_MBOX_MSG_HDR_SIZE (2)                                      
#define M2MB_MBOX_PAYLOAD_MAX_SIZE (M2MB_SPI_SLAVE_RECEIVE_BUFFER_SIZE-M2MB_MBOX_MSG_HDR_SIZE)  
#ifdef M2MB_TX_MULTIPLE_ENQ_ENABLE
#define M2MB_SPI_SLAVE_WRITE_BUFFER_MAX   ((M2MB_SPI_SLAVE_WRITE_BUFFER_SIZE/M2MB_SPI_SLAVE_RECEIVE_BUFFER_SIZE)+1)     
#else
#define M2MB_SPI_SLAVE_WRITE_BUFFER_MAX   (1)   
#endif

//#define M2MB_MBOX_MAX_TX_SIZE                 1536
#define M2MB_MBOX_MAX_TX_SIZE           M2MB_MBOX_BLOCK_SIZE    
#define M2MB_SPI_SLAVE_FLOW_CTRL_LOW_THRESHOLD  3   
#define M2MB_SPI_SLAVE_FLOW_CTRL_HIGH_THRESHOLD 6   
#define M2MB_SPI_SLAVE_MBOX_ID (0)      
typedef struct M2MB_SLAVE_SPI_WRITE_REQUEST_S {
   UINT8 *data; 
   UINT16 length;       
} M2MB_SLAVE_SPI_WRITE_REQUEST_T;

typedef struct M2MB_SLAVE_MBOX_MSG_S {
    UINT16 length;      
    UINT8 buffer[M2MB_MBOX_PAYLOAD_MAX_SIZE];   
} M2MB_SLAVE_MBOX_MSG_T;

typedef struct M2M_SLAVE_SPI_BUFFER_S {
    struct M2M_SLAVE_SPI_BUFFER_S  *next;       
    UINT8                 *buffer;      
    UINT16                actual_length;        
    UINT8               htc_flags;      
    UINT8               end_point;      
    UINT16              buffer_offset;  
    UINT16              app_context;    
} M2MB_SLAVE_SPI_BUFFER_T;

typedef struct M2MB_SLAVE_SPI_S {

        CHAR            rx_buffer[M2MB_SPI_SLAVE_RECEIVE_BUFFER_COUNT][M2MB_SPI_SLAVE_RECEIVE_BUFFER_SIZE];
        UINT8           rx_get_index;           
        UINT8           rx_inuse_index;         
        UINT8           rx_recycle_index;       
    M2MB_SLAVE_SPI_WRITE_REQUEST_T   write_req; 
        M2MB_SLAVE_SPI_BUFFER_T rx_buf_info[M2MB_SPI_SLAVE_RECEIVE_BUFFER_COUNT];
        M2MB_SLAVE_SPI_BUFFER_T tx_buf_info[M2MB_SPI_SLAVE_WRITE_BUFFER_MAX];
    UINT8 tx_buffer[M2MB_SPI_SLAVE_WRITE_BUFFER_MAX][2048];
        
#ifdef M2MB_TX_MULTIPLE_ENQ_ENABLE
        UINT8 tx_req_cnt;   
        UINT8 tx_done_cnt;  
#endif

        UINT16 tx_pend_len; 
        UINT16 tx_done_len; 
        UINT8 rx_enque_cnt; 
        UINT8 rx_pause;     
        M2MB_OS_SEM_HANDLE      sem_handle;             
        M2MB_OS_EV_HANDLE       ev_tx_handle;           
        M2MB_OS_EV_HANDLE       ev_init_handle;         
        UINT8 init_done;                
        INT32 instance_id;              
        INT32 mbox_id;                  
    UINT8 enable;                       
}M2MB_SLAVE_SPI_T;
typedef enum {
    M2MB_SDIO_SLAVE_INSTANCE_ID = 0,
    M2MB_SPI_SLAVE_INSTANCE_ID,
    M2MB_MAX_INSTANCES
} qapi_HTC_Instance_id_t;

/* Global functions =============================================================================*/
/*-----------------------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------------------*/
INT32 m2mb_slave_spi_send_buflist_enqueue(INT32 instance_id, INT32 mbox, M2MB_SLAVE_SPI_BUFFER_T *bufinfo);
/*-----------------------------------------------------------------------------------------------*/
INT32 m2mb_slave_spi_send_buflist_dequeue(INT32 instance_id, INT32 mbox, M2MB_SLAVE_SPI_BUFFER_T **pbufinfo);
/*-----------------------------------------------------------------------------------------------*/
INT32 m2mb_slave_spi_recv_buflist_enqueue(INT32 instance_id, INT32 mbox, M2MB_SLAVE_SPI_BUFFER_T *bufinfo);
/*-----------------------------------------------------------------------------------------------*/
INT32 m2mb_slave_spi_recv_buflist_dequeue(INT32 instance_id, INT32 mbox, M2MB_SLAVE_SPI_BUFFER_T **pbufinfo);
/*-----------------------------------------------------------------------------------------------*/
void m2mb_slave_spi_resume_recv(INT32 instance_id, INT32 mbox);
/*-----------------------------------------------------------------------------------------------*/
void m2mb_slave_spi_pause_recv(INT32 instance_id, INT32 mbox);
/*-----------------------------------------------------------------------------------------------*/
void m2mb_slave_spi_tx_credit_inc(INT32 instance_id, INT32 mbox);
/*-----------------------------------------------------------------------------------------------*/
void m2mb_slave_spi_deinit(int instance_id, int mbox);
/*-----------------------------------------------------------------------------------------------*/
void m2mb_slave_spi_post_init(UINT32 instance_id,INT32 mbox,
                        UINT32 block_size, UINT32 rxmsg_size,void *pResetCb);
/*-----------------------------------------------------------------------------------------------*/
INT32 m2mb_slave_spi_pre_init(UINT32 instance_id,INT32 mbox, UINT32 rx_buf_size,
                        void *pInitCb,void *pSendCb,void *pRecvCb, void *pContext);
/*-----------------------------------------------------------------------------------------------*/
#endif  /* M2MB_SLAVE_SPI_API_H*/