|
| struct | M2MB_GPIO_CFG_T |
| |
| struct | M2MB_GPIOINT_CFG_T |
| |
| enum | M2MB_GPIO_IOCTL_REQUEST {
M2MB_GPIO_IOCTL_SET_CFG,
M2MB_GPIO_IOCTL_GET_CFG
} |
| |
| enum | M2MB_GPIOINT_IOCTL_REQUEST {
M2MB_GPIOINT_IOCTL_SET_CFG,
M2MB_GPIOINT_IOCTL_GET_CFG,
M2MB_GPIOINT_IOCTL_SET_TRIGGER_TYPE,
M2MB_GPIOINT_IOCTL_GET_TRIGGER_TYPE,
M2MB_GPIOINT_IOCTL_GET_INT_PRIO,
M2MB_GPIOINT_IOCTL_GET_INT_MASK,
M2MB_GPIOINT_IOCTL_GET_GPIO_NUM,
M2MB_GPIOINT_IOCTL_SET_INT_EN,
M2MB_GPIOINT_IOCTL_SET_INT_DIS,
M2MB_GPIOINT_IOCTL_SET_TRIGGER_INT,
M2MB_GPIOINT_IOCTL_GET_INT_PENDING,
M2MB_GPIOINT_IOCTL_SET_CALLBACK_FN,
M2MB_GPIOINT_IOCTL_GET_CALLBACK_FN,
M2MB_GPIOINT_IOCTL_SET_CALLBACK_CTXT,
M2MB_GPIOINT_IOCTL_GET_CALLBACK_CTXT
} |
| |
| enum | M2MB_GPIO_DIRECTION_T {
M2MB_GPIO_INPUT_E = 0,
M2MB_GPIO_OUTPUT_E = 1,
M2MB_GPIO_INVALID_DIR_E = 0x7fffffff
} |
| |
| enum | M2MB_GPIO_PULL_T {
M2MB_GPIO_NO_PULL_E = 0x0,
M2MB_GPIO_PULL_DOWN_E = 0x1,
M2MB_GPIO_PULL_UP_E = 0x2,
M2MB_GPIO_INVALID_PULL_E = 0x7fffffff
} |
| |
| enum | M2MB_GPIO_DRIVE_T {
M2MB_GPIO_1P6MA_E = 0,
M2MB_GPIO_2P7MA_E = 1,
M2MB_GPIO_4P0MA_E = 2,
M2MB_GPIO_INVALID_STRENGTH_E = 0x7fffffff
} |
| |
| enum | M2MB_GPIO_VALUE_T {
M2MB_GPIO_LOW_VALUE_E,
M2MB_GPIO_HIGH_VALUE_E,
M2MB_GPIO_INVALID_VALUE_E = 0x7fffffff
} |
| |
| enum | M2MB_GPIOINT_TRIGGER_TYPE_T {
M2MB_GPIOINT_TRIGGER_HIGH_LEVEL_E = 0,
M2MB_GPIOINT_TRIGGER_LOW_LEVEL_E = 1,
M2MB_GPIOINT_TRIGGER_RISING_EDGE_E = 2,
M2MB_GPIOINT_TRIGGER_FALLING_EDGE_E = 3,
M2MB_GPIOINT_TRIGGER_DUAL_EDGE_E = 4,
M2MB_GPIOINT_TRIGGER_INVALID_E = 0x7fffffff
} |
| |
| enum | M2MB_GPIOINT_INTERRUPT_PRIORITY_T {
M2MB_GPIOINT_INTERRUPT_PRIORITY_HIGHEST_E = 0,
M2MB_GPIOINT_INTERRUPT_PRIORITY_HIGH_E = 1,
M2MB_GPIOINT_INTERRUPT_PRIORITY_MEDIUM_E = 2,
M2MB_GPIOINT_INTERRUPT_PRIORITY_LOW_E = 3,
M2MB_GPIOINT_INTERRUPT_PRIORITY_LOWEST_E = 4,
M2MB_GPIOINT_INTERRUPT_PRIORITY_INVALID_E = 0x7fffffff
} |
| |
| enum | M2MB_GPIOINT_INTERRUPT_MASK_T {
M2MB_GPIOINT_INTERRUPT_MASKABLE_E = 0,
M2MB_GPIOINT_INTERRUPT_NONMASKABLE_E = 1,
M2MB_GPIOINT_INTERRUPT_MASK_INVALID_E = 0x7fffffff
} |
| |
| typedef enum M2MB_GPIO_IOCTL_REQUEST | M2MB_GPIO_IOCTL_REQUEST_T |
| |
| typedef enum M2MB_GPIOINT_IOCTL_REQUEST | M2MB_GPIOINT_IOCTL_REQUEST_T |
| |
| typedef uint32_t | M2MB_GPIO_ID_T |
| |
| typedef uint32_t | M2MB_GPIO_PIN_T |
| |
| typedef void * | M2MB_GPIOINT_ID_T |
| |
| typedef uint32_t | M2MB_GPIOINT_PIN_T |
| |
| typedef uint32_t | M2MB_GPIOINT_CALLBACK_DATA_T |
| |
| typedef void(* | M2MB_GPIOINT_CB_T) (M2MB_GPIOINT_CALLBACK_DATA_T) |
| |
| INT32 | m2mb_gpio_open (const CHAR *path, INT32 flags,...) |
| | Open a GPIO port. More...
|
| |
| INT32 | m2mb_gpio_close (INT32 fd) |
| | Closes a GPIO port. More...
|
| |
| INT32 | m2mb_gpio_ioctl (INT32 fd, M2MB_GPIO_IOCTL_REQUEST_T request,...) |
| | Configure the GPIO port. More...
|
| |
| SSIZE_T | m2mb_gpio_read (INT32 fd, void *buf, SIZE_T nbyte) |
| | Read the GPIO port. More...
|
| |
| SSIZE_T | m2mb_gpio_write (INT32 fd, const void *buf, SIZE_T nbyte) |
| | Write to GPIO port. More...
|
| |
| INT32 | m2mb_gpioint_open (const CHAR *path, INT32 cfg,...) |
| | Open a GPIO port and enable the interrupt. More...
|
| |
| INT32 | m2mb_gpioint_close (INT32 fd) |
| | Closes a GPIO port. More...
|
| |
| INT32 | m2mb_gpioint_ioctl (INT32 fd, M2MB_GPIOINT_IOCTL_REQUEST_T request,...) |
| | Configure the GPIO port. More...
|
| |
GPIO library implementation.
we866e4/epl/core/m2mb/driver/m2mb_inc/m2mb_gpio.h
The following functions are implemented: m2mb_gpio_ioctl m2mb_gpio_open m2mb_gpio_read m2mb_gpio_write m2mb_gpio_close
- Note
- Dependencies: m2m/m2m_generic/common/m2mb_inc/m2mb_types.h
- Author
- Hemanth Sundaresh
- Date
- 28/12/2017
Definition in file m2mb_gpio.h.
1.8.14