    vs_3_0
    def c8, 1, 0, 0, 0
    dcl_position v0
    dcl_texcoord v1
    dcl_position o0
    dcl_texcoord o1.xy
    dcl_texcoord1 o2.xyz
	mov r13, v0
    slt r0.x, v1.z, -v1.z
    frc r0.y, v1.z
    add r0.z, -r0.y, v1.z
    slt r0.y, -r0.y, r0.y
    mad r0.x, r0.x, r0.y, r0.z
    mova a0.x, r0.x
    mov r0.xyz, c0[a0.x]
    mul r1.xyz, r0.y, c5
    mad r0.xyw, c4.xyzz, r0.x, r1.xyzz
    mad o2.xyz, c6, r0.z, r0.xyww
    mad o0.xyw, v0.xyzx, c8.xxzy, c8.yyzx
    mov o0.z, c7.x
    mov o1.xy, v1

// approximately 13 instruction slots used
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