//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v1.3.16 on Tue May 25 00:00:52 2021
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_0
dcl_globalFlags refactoringAllowed
dcl_resource_texture2d (float,float,float,float) t0
dcl_resource_texture2d (float,float,float,float) t1
dcl_uav_typed_texture2d (float,float,float,float) u0
dcl_input vThreadIDInGroup.x
dcl_input vThreadID.xy
dcl_temps 40
dcl_resource_texture2d (float,float,float,float) t125
dcl_tgsm_structured g0, 4, 128
dcl_tgsm_structured g1, 16, 128
dcl_thread_group 64, 1, 1

ld_indexable(texture2d)(float,float,float,float) r25.xyzw, l(0, 0, 0, 0), t125.xyzw
ld_indexable(texture2d)(float,float,float,float) r26.xyzw, l(2, 0, 0, 0), t125.xyzw
dcl_resource_texture1d (float,float,float,float) t120
ld_indexable(texture1d)(float,float,float,float) r35.xyzw, l(10, 0, 0, 0), t120.xyzw

iadd r0.xyzw, vThreadID.xyxy, l(32, 0, -32, 0)
mov r1.xy, r0.zwzz
mov r1.zw, l(0,0,0,0)
ld_indexable(texture2d)(float,float,float,float) r2.x, r1.xyww, t0.xyzw
mov r0.zw, l(0,0,0,0)



ld_indexable(texture2d)(float,float,float,float) r2.y, r0.xyww, t0.yxzw
store_structured g0.x, vThreadIDInGroup.x, l(0), r2.x
iadd r2.z, vThreadIDInGroup.x, l(64)
store_structured g0.x, r2.z, l(0), r2.y
lt r2.x, l(0.001000), r2.x
ld_indexable(texture2d)(float,float,float,float) r1.xyzw, r1.xyzw, t1.xyzw
and r1.xyzw, r1.xyzw, r2.xxxx
store_structured g1.xyzw, vThreadIDInGroup.x, l(0), r1.xyzw
lt r1.x, l(0.001000), r2.y
ld_indexable(texture2d)(float,float,float,float) r0.xyzw, r0.xyzw, t1.xyzw



and r0.xyzw, r0.xyzw, r1.xxxx
store_structured g1.xyzw, r2.z, l(0), r0.xyzw
sync_g_t
iadd r0.x, vThreadIDInGroup.x, l(32)
ld_structured r0.y, r0.x, l(0), g0.xxxx
lt r0.z, l(0.001000), r0.y
if_nz r0.z
  ld_structured r1.xyzw, r0.x, l(0), g1.xyzw
  mov r2.xyzw, r1.xyzw
  
  
  
  mov r0.zw, l(0,0,1.000000,4.000000)
  mov r3.x, l(1)
  loop
    ige r3.y, r3.x, l(8)
    breakc_nz r3.y
    iadd r3.y, r0.x, -r3.x
    ld_structured r3.z, r3.y, l(0), g0.xxxx
    iadd r3.w, r0.x, r3.x
    ld_structured r4.x, r3.w, l(0), g0.xxxx
    add r3.z, -r0.y, r3.z
    add r4.x, r0.y, -r4.x
    add r3.z, |r3.z|, -|r4.x|
    div r3.z, |r3.z|, r0.y
    mad r3.z, -r3.z, l(256.000000), l(0.900000)
    max r3.z, r3.z, l(0.000000)
    mul r0.w, r0.w, r3.z
    eq r3.z, r0.w, l(0.000000)
    if_nz r3.z
      break
    endif
    mad r0.z, r0.w, l(2.000000), r0.z
    ld_structured r4.xyzw, r3.y, l(0), g1.xyzw
    mov_sat r4.xyzw, r4.xyzw
    mad r4.xyzw, r4.xyzw, r0.wwww, r2.xyzw
    ld_structured r5.xyzw, r3.w, l(0), g1.xyzw
    mov_sat r5.xyzw, r5.xyzw
    mad r2.xyzw, r5.xyzw, r0.wwww, r4.xyzw
    iadd r3.x, r3.x, l(1)
  endloop
else
  mov r2.xyzw, l(0,0,0,-1.000000)
  mov r0.z, l(1.000000)
endif
div r0.xyzw, r2.xyzw, r0.zzzz
store_uav_typed u0.xyzw, vThreadID.xyyy, r0.xyzw
ret
// Approximately 0 instruction slots used
