//clipping lgihts =?? may no fix here

//
// Generated by Microsoft (R) HLSL Shader Compiler 10.0.10011.16384
//
//   using 3Dmigoto v1.3.11 on Sun Nov 25 08:54:57 2018
//
//
// Buffer Definitions:
//
// cbuffer LightCountData_CB
// {
//
//   struct tLightCountData
//   {
//
//       uint mNumLights;               // Offset:    0
//       uint mNumXTiles;               // Offset:    4
//       uint mNumYTiles;               // Offset:    8
//       uint mSHScalesReflectionFlag;  // Offset:   12
//
//   } LightCountData;                  // Offset:    0 Size:    16
//
// }
//
// cbuffer TiledDeferredCSParams_CB
// {
//
//   struct tTiledDeferredCS
//   {
//
//       row_major float4x4 mMainSceneInvProj;// Offset:    0
//       row_major float4x4 mMainSceneProj;// Offset:   64
//       row_major float4x4 mMainSceneView;// Offset:  128
//       row_major float4x4 mMainSceneInvTransInvView;// Offset:  192
//       row_major float4x4 mMainSceneInvViewProjThread;// Offset:  256
//       row_major float4x4 mMainSceneViewProj;// Offset:  320
//       float4 mScreenResClipDistances;// Offset:  384
//       float4 mAOStrengthParams;      // Offset:  400
//       float4 mCameraPosition;        // Offset:  416
//       float4 mCameraParameters[2];   // Offset:  432
//       float4 mAnisoParams;           // Offset:  464
//       float4 mLightShadowParams;     // Offset:  480
//       float4 mShadowMapTexelSize;    // Offset:  496
//       float4 mViewportInfo;          // Offset:  512
//       float4 mClusteredLightingParams[4];// Offset:  528
//       float4 mRimLightParams[2];     // Offset:  592
//       float4 mTranslucencyLightingDebugParams;// Offset:  624
//       float4 mLightComponentToggler[4];// Offset:  640
//       float4 mLightingExperiment[3]; // Offset:  704
//       float4 mLightingModelTestParams[5];// Offset:  752
//       float2 mDirectLightingExtraParams;// Offset:  832
//       float2 mFullScreenRenderTargetDimensions;// Offset:  840
//       float mEyeLightWrapPercent;    // Offset:  848
//       int mEnableSssOnPointLights;   // Offset:  852
//       int mEnableTranslucencyLighting;// Offset:  856
//       int mDebugMaxLightListEntries; // Offset:  860
//
//   } TiledDeferredCSParams;           // Offset:    0 Size:   864
//
// }
//
// Resource bind info for NumLightsPerTile
// {
//
//   uint $Element;                     // Offset:    0 Size:     4
//
// }
//
// Resource bind info for sss_feature_flags
// {
//
//   uint $Element;                     // Offset:    0 Size:     4
//
// }
//
// Resource bind info for translucency_feature_flags
// {
//
//   uint $Element;                     // Offset:    0 Size:     4
//
// }
//
// Resource bind info for aniso_specular_flags
// {
//
//   uint $Element;                     // Offset:    0 Size:     4
//
// }
//
// Resource bind info for output_append_buffer_default
// {
//
//   struct tTileLocation
//   {
//
//       uint x_y_packed;               // Offset:    0
//
//   } $Element;                        // Offset:    0 Size:     4
//
// }
//
// Resource bind info for output_append_buffer_sss
// {
//
//   struct tTileLocation
//   {
//
//       uint x_y_packed;               // Offset:    0
//
//   } $Element;                        // Offset:    0 Size:     4
//
// }
//
// Resource bind info for output_append_buffer_default_and_translucency_combo
// {
//
//   struct tTileLocation
//   {
//
//       uint x_y_packed;               // Offset:    0
//
//   } $Element;                        // Offset:    0 Size:     4
//
// }
//
// Resource bind info for output_append_buffer_aniso_specular
// {
//
//   struct tTileLocation
//   {
//
//       uint x_y_packed;               // Offset:    0
//
//   } $Element;                        // Offset:    0 Size:     4
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// NumLightsPerTile                  texture  struct         r/o    0        1
// sss_feature_flags                 texture  struct         r/o    1        1
// translucency_feature_flags        texture  struct         r/o    2        1
// aniso_specular_flags              texture  struct         r/o    3        1
// output_append_buffer_default          UAV  struct      append    0        1
// output_append_buffer_sss              UAV  struct      append    1        1
// output_append_buffer_default_and_translucency_combo        UAV  struct      append    2        1
// output_append_buffer_aniso_specular        UAV  struct      append    3        1
// LightCountData_CB                 cbuffer      NA          NA    1        1
// TiledDeferredCSParams_CB          cbuffer      NA          NA    2        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_0
dcl_globalFlags refactoringAllowed
dcl_constantbuffer cb1[1], immediateIndexed
dcl_constantbuffer cb2[54], immediateIndexed
dcl_resource_structured t0, 4
dcl_resource_structured t1, 4
dcl_resource_structured t2, 4
dcl_resource_structured t3, 4
dcl_uav_structured u0, 4
dcl_uav_structured u1, 4
dcl_uav_structured u2, 4
dcl_uav_structured u3, 4
dcl_input vThreadID.x
dcl_temps 6
dcl_thread_group 256, 1, 1
ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.x, vThreadID.x, l(0), t0.xxxx
ilt r0.x, l(0), r0.x
if_nz r0.x
  udiv r0.x, r1.x, vThreadID.x, cb1[0].y
  bfi r0.y, l(16), l(16), r1.x, r0.x
  imad r0.x, r0.x, cb1[0].y, r1.x
  ishl r0.z, r0.x, l(3)
  bfi r1.xyzw, l(29, 29, 29, 29), l(3, 3, 3, 3), r0.xxxx, l(1, 2, 3, 4)
  bfi r2.xyz, l(29, 29, 29, 0), l(3, 3, 3, 0), r0.xxxx, l(5, 6, 7, 0)
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.x, r0.z, l(0), t3.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.w, r1.x, l(0), t3.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.w, r1.y, l(0), t3.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r3.x, r1.z, l(0), t3.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r3.y, r1.w, l(0), t3.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r3.z, r2.x, l(0), t3.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r3.w, r2.y, l(0), t3.xxxx
  ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r4.x, r2.z, l(0), t3.xxxx
  ine r4.yz, cb2[53].yyzy, l(0, 1, 1, 0)
  if_nz r4.y
    mov r4.w, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r4.w, r0.z, l(0), t1.xxxx
  endif
  if_nz r4.z
    mov r5.x, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r5.x, r0.z, l(0), t2.xxxx
  endif
  or r0.z, r4.w, r5.x
  or r0.z, r0.x, r0.z
  ine r0.z, r0.z, l(-1)
  if_nz r4.y
    mov r5.y, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r5.y, r1.x, l(0), t1.xxxx
  endif
  if_nz r4.z
    mov r5.z, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r5.z, r1.x, l(0), t2.xxxx
  endif
  or r1.x, r5.z, r5.y
  or r1.x, r0.w, r1.x
  ine r1.x, r1.x, l(-1)
  or r0.z, r0.z, r1.x
  or r1.x, r4.w, r5.y
  or r4.w, r5.z, r5.x
  or r0.x, r0.w, r0.x
  if_nz r4.y
    mov r0.w, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r0.w, r1.y, l(0), t1.xxxx
  endif
  if_nz r4.z
    mov r5.x, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r5.x, r1.y, l(0), t2.xxxx
  endif
  or r1.y, r0.w, r5.x
  or r1.y, r2.w, r1.y
  ine r1.y, r1.y, l(-1)
  or r0.z, r0.z, r1.y
  or r0.w, r0.w, r1.x
  or r1.x, r4.w, r5.x
  or r0.x, r2.w, r0.x
  if_nz r4.y
    mov r1.y, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.y, r1.z, l(0), t1.xxxx
  endif
  if_nz r4.z
    mov r2.w, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r2.w, r1.z, l(0), t2.xxxx
  endif
  or r1.xz, r1.xxyx, r2.wwww
  or r1.z, r3.x, r1.z
  ine r1.z, r1.z, l(-1)
  or r0.zw, r0.zzzw, r1.zzzy
  or r0.x, r3.x, r0.x
  if_nz r4.y
    mov r1.y, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.y, r1.w, l(0), t1.xxxx
  endif
  if_nz r4.z
    mov r1.z, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.z, r1.w, l(0), t2.xxxx
  endif
  or r1.xw, r1.zzzz, r1.xxxy
  or r1.w, r3.y, r1.w
  ine r1.w, r1.w, l(-1)
  or r0.zw, r0.zzzw, r1.wwwy
  or r0.x, r3.y, r0.x
  if_nz r4.y
    mov r1.y, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.y, r2.x, l(0), t1.xxxx
  endif
  if_nz r4.z
    mov r1.z, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.z, r2.x, l(0), t2.xxxx
  endif
  or r1.xw, r1.zzzz, r1.xxxy
  or r1.w, r3.z, r1.w
  ine r1.w, r1.w, l(-1)
  or r0.zw, r0.zzzw, r1.wwwy
  or r0.x, r3.z, r0.x
  if_nz r4.y
    mov r1.y, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.y, r2.y, l(0), t1.xxxx
  endif
  if_nz r4.z
    mov r1.z, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.z, r2.y, l(0), t2.xxxx
  endif
  or r1.xw, r1.zzzz, r1.xxxy
  or r1.w, r3.w, r1.w
  ine r1.w, r1.w, l(-1)
  or r0.zw, r0.zzzw, r1.wwwy
  or r0.x, r3.w, r0.x
  if_nz r4.y
    mov r1.y, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.y, r2.z, l(0), t1.xxxx
  endif
  if_nz r4.z
    mov r1.z, l(0)
  else
    ld_structured_indexable(structured_buffer, stride=4)(mixed,mixed,mixed,mixed) r1.z, r2.z, l(0), t2.xxxx
  endif
  or r1.xw, r1.zzzz, r1.xxxy
  or r1.w, r4.x, r1.w
  ine r1.w, r1.w, l(-1)
  or r0.zw, r0.zzzw, r1.wwwy
  or r0.x, r4.x, r0.x
  ieq r1.y, r1.x, l(0)
  and r0.z, r0.z, r1.y
  if_nz r0.z
    imm_atomic_alloc r2.x, u0
    store_structured u0.x, r2.x, l(0), r0.y
  endif
  if_nz r0.w
    imm_atomic_alloc r2.x, u1
    store_structured u1.x, r2.x, l(0), r0.y
  endif
  if_nz r1.x
    imm_atomic_alloc r1.x, u2
    store_structured u2.x, r1.x, l(0), r0.y
  endif
  if_nz r0.x
    imm_atomic_alloc r1.x, u3
    store_structured u3.x, r1.x, l(0), r0.y
  endif
endif
ret
// Approximately 160 instruction slots used
