// Culling
// Generated by Microsoft (R) D3D Shader Disassembler
//
//   using 3Dmigoto v1.3.7 on Sat Mar 24 11:50:28 2018
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_0
dcl_globalFlags refactoringAllowed
dcl_constantbuffer cb0[81], immediateIndexed
dcl_constantbuffer cb2[53], immediateIndexed
dcl_sampler s0, mode_default
dcl_resource_buffer (uint,uint,uint,uint) t0
dcl_resource_texture2d (float,float,float,float) t1
dcl_uav_structured u0, 8
dcl_uav_structured u1, 32
dcl_uav_structured u2, 32
dcl_uav_typed_buffer (uint,uint,uint,uint) u3
dcl_uav_typed_texture2d (uint,uint,uint,uint) u4
dcl_uav_typed_texture2d (uint,uint,uint,uint) u5
dcl_input vThreadIDInGroup.xy
dcl_input vThreadID.xy
//dcl_temps 9

dcl_temps 23

dcl_tgsm_structured g0, 4, 4
dcl_tgsm_structured g1, 4, 4
dcl_tgsm_structured g2, 4, 64
dcl_tgsm_structured g3, 4, 4
dcl_tgsm_structured g4, 4, 64
dcl_tgsm_structured g5, 4, 64
dcl_tgsm_structured g6, 16, 64
dcl_thread_group 8, 8, 1

//3Dmigoto
dcl_resource_texture2d (float,float,float,float) t125

ishl r0.xy, vThreadID.xyxx, l(1, 1, 0, 0)
utof r1.xy, r0.xyxx
add r1.zw, cb0[73].zzzw, l(0.000000, 0.000000, -2.000000, -2.000000)
min r1.xy, r1.zwzz, r1.xyxx
ftou r1.xy, r1.xyxx
utof r1.xy, r1.xyxx
mul r1.xy, r1.xyxx, cb0[79].zwzz
gather4_aoffimmi_indexable(1,1,0)(texture2d)(float,float,float,float) r2.xyzw, r1.xyxx, t1.xyzw, s0.x
imad r3.xy, vThreadIDInGroup.xyxx, l(256, 256, 0, 0), vThreadIDInGroup.xyxx
bfi r3.zw, l(0, 0, 8, 8), l(0, 0, 4, 4), r3.xxxy, l(0, 0, 0, 0)
bfi r3.xy, l(4, 4, 0, 0), l(0, 0, 0, 0), r3.xyxx, r3.zwzz
and r3.zw, r3.xxxy, l(0, 0, 7, 7)
bfi r3.xy, l(4, 4, 0, 0), l(2, 2, 0, 0), r3.xyxx, l(0, 0, 0, 0)
or r3.xy, r3.xyxx, r3.zwzz
and r3.xy, r3.xyxx, l(19, 19, 0, 0)
ishl r3.zw, r3.xxxy, l(0, 0, 1, 1)
or r3.xy, r3.zwzz, r3.xyxx
ishl r3.y, r3.y, l(1)
and r3.xy, r3.xyxx, l(21, 42, 0, 0)
iadd r3.x, r3.y, r3.x
min r3.y, r2.z, r2.y
min r3.y, r2.x, r3.y
min r3.y, r2.w, r3.y
store_structured g4.x, r3.x, l(0), r3.y
max r2.y, r2.z, r2.y
max r2.x, r2.y, r2.x
max r2.x, r2.w, r2.x
store_structured g5.x, r3.x, l(0), r2.x
sync_g_t
and r2.y, r3.x, l(15)
ushr r2.z, r3.x, l(4)
if_z r2.y
  mov r1.z, r3.y
  mov r4.z, r2.x
  mov r2.w, l(1)
  loop
    ige r3.z, r2.w, l(16)
    breakc_nz r3.z
    iadd r3.z, r2.w, r3.x
    ld_structured r3.w, r3.z, l(0), g4.xxxx
    min r1.z, r1.z, r3.w
    ld_structured r3.z, r3.z, l(0), g5.xxxx
    max r4.z, r3.z, r4.z
    iadd r2.w, r2.w, l(1)
  endloop
  mul r1.w, r1.z, cb0[73].x
  mul r4.w, r4.z, cb0[73].y
  mul r2.xw, cb0[73].zzzw, cb0[79].zzzw
  mad r3.yz, cb0[79].zzwz, l(0.000000, 8.000000, 8.000000, 0.000000), r1.xxyx
  min r5.xy, r2.xwxx, r3.yzyy
  store_structured g6.xyzw, r3.x, l(0), r1.xyzw
  iadd r6.xyzw, r3.xxxx, l(1, 2, 3, 4)
  mov r4.xy, r1.xyxx
  store_structured g6.xyzw, r6.x, l(0), r4.xyzw
  mov r7.x, r5.x
  mov r7.yzw, r1.yyzw
  store_structured g6.xyzw, r6.y, l(0), r7.xyzw
  mov r8.xy, r7.xyxx
  mov r8.zw, r4.zzzw
  store_structured g6.xyzw, r6.z, l(0), r8.xyzw
  mov r5.xzw, r1.xxzw
  store_structured g6.xyzw, r6.w, l(0), r5.xyzw
  iadd r1.xyz, r3.xxxx, l(5, 6, 7, 0)
  mov r4.y, r5.y
  store_structured g6.xyzw, r1.x, l(0), r4.xyzw
  mov r4.xzw, r7.xxzw
  store_structured g6.xyzw, r1.y, l(0), r4.xyzw
  mov r4.xzw, r8.xxzw
  store_structured g6.xyzw, r1.z, l(0), r4.xyzw
  ge r1.x, r5.z, l(10000000.000000)
else
  mov r1.x, l(0)
endif
ult r1.y, r2.y, l(8)
if_nz r1.y
  ld_structured r4.xyzw, r3.x, l(0), g6.xywz
  mul r5.xy, cb0[78].xyxx, cb0[79].zwzz
  mov r5.z, -r5.y
  add r1.yz, r4.xxyx, -r5.xxzx
  div r2.xw, l(0.500000, 0.000000, 0.000000, 0.500000), cb2[22].xxxy
  mul r1.yz, r1.yyzy, r2.xxwx
  mad r1.yz, r1.yyzy, cb2[21].zzwz, cb2[21].xxyx
  mul r5.xy, r4.wwww, r1.yzyy
  mov r5.z, r4.w
  mov r5.w, l(1.000000)
  
// Fix Culling
ld_indexable(texture2d)(float,float,float,float) r21.xyzw, l(0, 0, 0, 0), t125.xyzw
add r22.w, r5.z, -r21.y
mul r22.w, r22.w, r21.x
mul r22.w, r22.w, cb2[21].x
add r5.x, r5.x, r22.w
  
  dp4 r1.y, cb0[74].xyzw, r5.xyzw
  dp4 r1.z, cb0[75].xyzw, r5.xyzw
  dp4 r6.y, cb0[76].xyzw, r5.xyzw
  ftou r7.xy, r1.yzyy
  ushr r2.xw, r7.xxxy, cb0[71].xxxx
  imad r1.w, r2.w, cb0[71].y, r2.x
  ld_indexable(buffer)(uint,uint,uint,uint) r1.w, r1.wwww, t0.yzwx
  and r2.x, r1.w, l(0x00ffffff)
  ushr r1.w, r1.w, l(24)
  lt r2.w, r1.y, l(0.000000)
  utof r3.yz, cb0[71].yyzy
  ge r1.y, r1.y, r3.y
  or r1.y, r1.y, r2.w
  lt r2.w, r1.z, l(0.000000)
  or r1.y, r1.y, r2.w
  ge r1.z, r1.z, r3.z
  or r1.y, r1.z, r1.y
  countbits r1.z, r1.w
  iadd r1.z, r1.z, r2.x
  ld_indexable(buffer)(uint,uint,uint,uint) r1.z, r1.zzzz, t0.yzxw
  movc r6.x, r1.y, l(0), r1.z
  mov r4.xy, r5.xyxx
  mul r3.yzw, r4.xxyz, cb0[25].xxyz
  dp3 r1.z, r3.yzwy, r3.yzwy
  mov r4.x, l(0)
  mov r4.yzw, cb0[24].xxyz
  ge r4.xyzw, r1.zzzz, r4.xyzw
  and r4.xyzw, r4.xyzw, l(0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000)
  lt r5.xyzw, r1.zzzz, cb0[24].xyzw
  and r5.xyzw, r5.xyzw, l(0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000)
  mul r5.xyzw, r4.xyzw, r5.xyzw
  dp4 r0.z, r5.xyzw, cb0[29].xyzw
  dp4 r0.w, r5.xyzw, cb0[32].xyzw
  dp4 r7.x, r5.xyzw, cb0[26].xyzw
  dp4 r7.y, r5.xyzw, cb0[27].xyzw
  dp4 r7.z, r5.xyzw, cb0[28].xyzw
  dp4 r1.z, r4.xyzw, l(1.000000, 1.000000, 1.000000, 1.000000)
  ftoi r1.z, r1.z
  iadd r7.w, r1.z, l(-1)
  if_z r2.y
    store_structured g0.x, r2.z, l(0), r2.x
    store_structured g1.x, r2.z, l(0), r7.w
  endif
else
  mov r6.xy, l(0,340282346638528860000000000000000000000.000000,0,0)
  mov r0.zw, l(0,0,1.000000,1.000000)
  mov r2.x, l(-1)
  mov r1.y, l(0)
  mov r7.xyzw, l(0,0,0,-1)
endif
sync_g_t
lt r1.z, r6.y, r6.x
ld_structured r1.w, r2.z, l(0), g0.xxxx
ieq r1.w, r1.w, r2.x
ld_structured r2.x, r2.z, l(0), g1.xxxx
ieq r2.x, r2.x, r7.w
and r1.w, r1.w, l(2)
bfi r1.z, l(1), l(0), r1.z, r1.w
movc r1.y, r1.y, l(0), l(8)
iadd r1.y, r1.y, r1.z
and r1.z, r2.x, l(16)
iadd r1.y, r1.z, r1.y
store_structured g2.x, r3.x, l(0), r1.y
sync_g_t
if_z r2.y
  iadd r4.xyzw, r3.xxxx, l(1, 2, 3, 4)
  ld_structured r1.z, r4.x, l(0), g2.xxxx
  and r1.y, r1.z, r1.y
  ld_structured r1.z, r4.y, l(0), g2.xxxx
  and r1.y, r1.z, r1.y
  ld_structured r1.z, r4.z, l(0), g2.xxxx
  and r1.y, r1.z, r1.y
  ld_structured r1.z, r4.w, l(0), g2.xxxx
  and r1.y, r1.z, r1.y
  iadd r3.xyz, r3.xxxx, l(5, 6, 7, 0)
  ld_structured r1.z, r3.x, l(0), g2.xxxx
  and r1.y, r1.z, r1.y
  ld_structured r1.z, r3.y, l(0), g2.xxxx
  and r1.y, r1.z, r1.y
  ld_structured r1.z, r3.z, l(0), g2.xxxx
  and r1.y, r1.z, r1.y
  xor r1.y, r1.y, l(8)
  store_structured g3.x, r2.z, l(0), r1.y
endif
sync_g_t
if_z r2.y
  ld_structured r1.y, r2.z, l(0), g3.xxxx
  movc r2.w, r1.x, l(4), r1.y
  ushr r3.xyzw, vThreadID.xyyy, l(2, 2, 2, 2)
  mov r2.xyz, l(0,0,0,0)
  store_uav_typed u5.xyzw, r3.xwww, r2.xyzw
  store_uav_typed u4.xyzw, r3.xyzw, r2.wwww
  if_z r1.x
    and r1.xz, r1.yyyy, l(1, 0, 2, 0)
    ine r1.xz, r1.xxzx, l(0, 0, 0, 0)
    and r1.x, r1.z, r1.x
    if_nz r1.x
      imm_atomic_iadd r2.x, u3, l(9), l(1)
      store_structured u2.xyzw, r2.x, l(0), r0.xyzw
      store_structured u2.xyzw, r2.x, l(16), r7.xyzw
    else
      and r1.x, r1.y, l(16)
      if_nz r1.x
        imm_atomic_iadd r1.x, u3, l(6), l(1)
        store_structured u1.xyzw, r1.x, l(0), r0.xyzw
        store_structured u1.xyzw, r1.x, l(16), r7.xyzw
      else
        imm_atomic_iadd r1.x, u3, l(3), l(1)
        store_structured u0.xy, r1.x, l(0), r0.xyxx
      endif
    endif
  endif
endif
ret
// Approximately 0 instruction slots used

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
