// srvCrudeCullInfo (DSS)
// Generated by Microsoft (R) HLSL Shader Compiler 10.0.10011.16384
//
//   using 3Dmigoto v1.3.11 on Sun Nov 25 15:21:27 2018
//
//
// Buffer Definitions:
//
// cbuffer _cbCalculateMacroIndices
// {
//
//   struct S_cbCalculateMacroIndices
//   {
//
//       int2 viNumTiles;               // Offset:    0
//       int2 viNumMacroTiles;          // Offset:    8
//       int nNumNonGates;              // Offset:   16
//       int nNumGates;                 // Offset:   20
//       int nCSMVisibilityRejected;    // Offset:   24
//       int nEnablePlaneEquations;     // Offset:   28
//       float4 avPlaneEquations[5];    // Offset:   32
//
//   } cbCalculateMacroIndices;         // Offset:    0 Size:   112
//
// }
//
// Resource bind info for srvCrudeCullInfo
// {
//
//   uint4 $Element;                    // Offset:    0 Size:    16
//
// }
//
// Resource bind info for uavMacroTiles
// {
//
//   uint $Element;                     // Offset:    0 Size:     4
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// srvCrudeCullInfo                  texture  struct         r/o    1        1
// uavMacroTiles                         UAV  struct         r/w    0        1
// _cbCalculateMacroIndices          cbuffer      NA          NA    5        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Input
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// no Output
cs_5_0
dcl_globalFlags refactoringAllowed
dcl_constantbuffer cb5[7], immediateIndexed
dcl_resource_structured t1, 16
dcl_uav_structured u0, 4
dcl_input vThreadIDInGroupFlattened
dcl_input vThreadGroupID.xy
dcl_temps 8
dcl_tgsm_structured g0, 256, 2
dcl_thread_group 64, 1, 1
//
// Initial variable locations:
//   vThreadGroupID.x <- gid.x; vThreadGroupID.y <- gid.y;
//   vThreadID.x <- dtid.x; vThreadID.y <- dtid.y;
//   vThreadIDInGroupFlattened.x <- nLinearGroupThreadId
//
#line 815 "common.fx"
imad r0.x, vThreadGroupID.y, cb5[0].z, vThreadGroupID.x  // r0.x <- <Mad24 return value>

#line 116 "C:\p4\PRJ_PRO\main\assembly\shaders\win32\lighttile.fx"
imul null, r0.y, r0.x, l(1025)  // r0.y <- nMacroTileBase

#line 131
if_nz cb5[1].w
  ishl r0.zw, vThreadGroupID.xxxy, l(0, 0, 6, 6)
  utof r0.zw, r0.zzzw  // r0.z <- vUV.x; r0.w <- vUV.y
  add r1.xy, r0.zwzz, l(63.000000, 63.000000, 0.000000, 0.000000)  // r1.x <- vUV2.x; r1.y <- vUV2.y

#line 141
  mul r1.zw, r0.zzzw, cb5[2].xxxy
  mul r2.xy, r1.xyxx, cb5[2].xyxx
  min r1.zw, r1.zzzw, r2.xxxy
  add r1.z, r1.w, r1.z
  add r1.z, r1.z, cb5[2].z  // r1.z <- fDot0
  mul r2.xy, r0.zwzz, cb5[3].xyxx
  mul r2.zw, r1.xxxy, cb5[3].xxxy
  min r2.xy, r2.zwzz, r2.xyxx
  add r1.w, r2.y, r2.x
  add r1.w, r1.w, cb5[3].z  // r1.w <- fDot1
  mul r2.xy, r0.zwzz, cb5[4].xyxx
  mul r2.zw, r1.xxxy, cb5[4].xxxy
  min r2.xy, r2.zwzz, r2.xyxx
  add r2.x, r2.y, r2.x
  add r2.x, r2.x, cb5[4].z  // r2.x <- fDot2
  mul r2.yz, r0.zzwz, cb5[5].xxyx
  mul r3.xy, r1.xyxx, cb5[5].xyxx
  min r2.yz, r2.yyzy, r3.xxyx
  add r2.y, r2.z, r2.y
  add r2.y, r2.y, cb5[5].z  // r2.y <- fDot3
  mul r0.zw, r0.zzzw, cb5[6].xxxy
  mul r1.xy, r1.xyxx, cb5[6].xyxx
  min r0.zw, r0.zzzw, r1.xxxy
  add r0.z, r0.w, r0.z
  add r0.z, r0.z, cb5[6].z  // r0.z <- fDot4
  max r0.w, r1.w, r1.z
  max r1.x, r2.y, r2.x
  max r0.z, r0.z, r1.x
  max r0.z, r0.z, r0.w  // r0.z <- fMaxDot

#line 150
  lt r0.z, l(0.000000), r0.z
  if_nz r0.z
    if_z vThreadIDInGroupFlattened.x
      store_structured u0.x, r0.y, l(0), l(-1)
    endif
    ret
  endif
endif

#line 117
imad r0.x, r0.x, l(1025), l(1)  // r0.x <- nMacroTileIndicesBase

#line 163
iadd r0.zw, cb5[1].xxxy, l(0, 0, 63, 63)

#line 123
ishl r1.xy, vThreadGroupID.xyxx, l(2, 2, 0, 0)  // r1.x <- nTileStartX; r1.y <- nTileStartY

#line 126
imad r1.zw, vThreadGroupID.xxxy, l(0, 0, 4, 4), l(0, 0, 3, 3)  // r1.z <- nTileEndX; r1.w <- nTileEndY

#line 163
ushr r0.zw, r0.zzzw, l(0, 0, 6, 6)  // r0.z <- nNumNonGatePasses; r0.w <- nNumGatePasses

#line 78
ishl r2.x, vThreadIDInGroupFlattened.x, l(2)

#line 86
uge r3.xyzw, vThreadIDInGroupFlattened.xxxx, l(1, 2, 4, 8)
iadd r4.xyzw, r2.xxxx, l(-4, -8, -16, -32)
uge r2.yz, vThreadIDInGroupFlattened.xxxx, l(0, 16, 32, 0)
iadd r5.xy, r2.xxxx, l(-64, -128, 0, 0)

#line 164
mov r2.w, l(0)  // r2.w <- nNumVisibleGates
mov r5.z, l(0)  // r5.z <- j
loop
  uge r5.w, r5.z, r0.w
  breakc_nz r5.w
  bfi r5.w, l(26), l(6), r5.z, vThreadIDInGroupFlattened.x  // r5.w <- i
  imul null, r6.x, r5.w, l(12)
  ld_structured_indexable(structured_buffer, stride=16)(mixed,mixed,mixed,mixed) r6.xy, r6.x, l(0), t1.xyxx  // r6.x <- Data.x; r6.y <- Data.y

#line 170
  and r6.zw, r6.xxxy, l(0, 0, 0x00003fff, 0x00003fff)  // r6.z <- nTileMinX
  ubfe r6.xy, l(14, 14, 0, 0), l(14, 14, 0, 0), r6.xyxx  // r6.x <- nTileMinY
  iadd r6.yw, r6.xxxz, r6.yyyw  // r6.w <- nTileMaxX; r6.y <- nTileMaxY

// Disable tile bounds (bye bye performance) -DarkStarSword
mov r6.z, l(0)
mov r6.w, cb5[0].x
//mov r6.w, l(2056)

#line 173
  ult r6.yw, r1.yyyx, r6.yyyw
  and r6.y, r6.y, r6.w
  uge r6.xz, r1.wwzw, r6.xxzx
  and r6.y, r6.z, r6.y
  and r6.x, r6.x, r6.y
  ult r6.y, r5.w, cb5[1].y
  and r6.x, r6.y, r6.x  // r6.x <- bVisible

#line 76
  sync_g_t
  and r6.y, r6.x, l(1)
  store_structured g0.x, l(0), r2.x, r6.y
  sync_g_t

#line 86
  ld_structured r6.yz, l(0), r4.x, g0.xxyx
  and r6.y, r3.x, r6.y
  iadd r6.y, r6.y, r6.z
  store_structured g0.x, l(1), r2.x, r6.y
  sync_g_t
  ld_structured r6.y, l(1), r2.x, g0.xxxx
  ld_structured r6.z, l(1), r4.y, g0.xxxx
  and r6.z, r3.y, r6.z
  iadd r6.y, r6.z, r6.y
  store_structured g0.x, l(0), r2.x, r6.y
  sync_g_t
  ld_structured r6.y, l(0), r2.x, g0.xxxx
  ld_structured r6.z, l(0), r4.z, g0.xxxx
  and r6.z, r3.z, r6.z
  iadd r6.y, r6.z, r6.y
  store_structured g0.x, l(1), r2.x, r6.y
  sync_g_t
  ld_structured r6.y, l(1), r2.x, g0.xxxx
  ld_structured r6.z, l(1), r4.w, g0.xxxx
  and r6.z, r3.w, r6.z
  iadd r6.y, r6.z, r6.y
  store_structured g0.x, l(0), r2.x, r6.y
  sync_g_t
  ld_structured r6.y, l(0), r2.x, g0.xxxx
  ld_structured r6.z, l(0), r5.x, g0.xxxx
  and r6.z, r2.y, r6.z
  iadd r6.y, r6.z, r6.y
  store_structured g0.x, l(1), r2.x, r6.y
  sync_g_t
  ld_structured r6.y, l(1), r2.x, g0.xxxx
  ld_structured r6.z, l(1), r5.y, g0.xxxx
  and r6.z, r2.z, r6.z
  iadd r6.y, r6.z, r6.y
  store_structured g0.x, l(0), r2.x, r6.y
  sync_g_t

#line 90
  ld_structured r6.y, l(0), l(252), g0.xxxx  // r6.y <- nTotal
  ld_structured r6.z, l(0), r2.x, g0.xxxx
  iadd r6.z, r2.w, r6.z

#line 180
  iadd r6.z, r6.z, l(-1)  // r6.z <- nDest
  ult r6.w, r6.z, l(1024)
  and r6.x, r6.w, r6.x
  if_nz r6.x
    iadd r6.x, r0.x, r6.z
    store_structured u0.x, r6.x, l(0), r5.w
  endif
  iadd r5.w, r2.w, r6.y
  umin r2.w, r5.w, l(1024)
  iadd r5.z, r5.z, l(1)
endloop

#line 204
iadd r0.w, cb5[1].x, cb5[1].y
ine r5.z, cb5[1].z, l(0)

#line 192
mov r5.w, r2.w  // r5.w <- nNumVisibleObjects
mov r6.x, l(0)  // r6.x <- j
loop
  uge r6.y, r6.x, r0.z
  breakc_nz r6.y
  bfi r6.y, l(26), l(6), r6.x, vThreadIDInGroupFlattened.x
  iadd r6.y, r6.y, cb5[1].y  // r6.y <- i
  imul null, r6.z, r6.y, l(12)
  ld_structured_indexable(structured_buffer, stride=16)(mixed,mixed,mixed,mixed) r6.zw, r6.z, l(0), t1.xxxy  // r6.z <- Data.x; r6.w <- Data.y

#line 198
  ushr r7.x, r6.z, l(28)  // r7.x <- nObjectType
  and r7.yz, r6.zzwz, l(0, 0x00003fff, 0x00003fff, 0)  // r7.y <- nTileMinX
  iadd r7.z, r7.y, r7.z  // r7.z <- nTileMaxX
  ubfe r6.zw, l(0, 0, 14, 14), l(0, 0, 14, 14), r6.zzzw  // r6.z <- nTileMinY
  iadd r6.w, r6.z, r6.w  // r6.w <- nTileMaxY

// Disable tile bounds (bye bye performance) -DarkStarSword
mov r7.y, l(0)
mov r7.z, cb5[0].x
//mov r7.z, l(2056)

#line 204
  ult r7.z, r1.x, r7.z
  ult r6.w, r1.y, r6.w
  and r6.w, r6.w, r7.z
  uge r7.y, r1.z, r7.y
  and r6.w, r6.w, r7.y
  uge r6.z, r1.w, r6.z
  and r6.z, r6.z, r6.w
  ult r6.w, r6.y, r0.w
  and r6.z, r6.w, r6.z
  ieq r6.w, r7.x, l(6)
  and r6.w, r5.z, r6.w
  not r6.w, r6.w
  and r6.z, r6.w, r6.z  // r6.z <- bVisible

#line 76
  sync_g_t
  and r6.w, r6.z, l(1)
  store_structured g0.x, l(0), r2.x, r6.w
  sync_g_t

#line 86
  ld_structured r7.xy, l(0), r4.x, g0.xyxx
  and r6.w, r3.x, r7.x
  iadd r6.w, r6.w, r7.y
  store_structured g0.x, l(1), r2.x, r6.w
  sync_g_t
  ld_structured r6.w, l(1), r2.x, g0.xxxx
  ld_structured r7.x, l(1), r4.y, g0.xxxx
  and r7.x, r3.y, r7.x
  iadd r6.w, r6.w, r7.x
  store_structured g0.x, l(0), r2.x, r6.w
  sync_g_t
  ld_structured r6.w, l(0), r2.x, g0.xxxx
  ld_structured r7.x, l(0), r4.z, g0.xxxx
  and r7.x, r3.z, r7.x
  iadd r6.w, r6.w, r7.x
  store_structured g0.x, l(1), r2.x, r6.w
  sync_g_t
  ld_structured r6.w, l(1), r2.x, g0.xxxx
  ld_structured r7.x, l(1), r4.w, g0.xxxx
  and r7.x, r3.w, r7.x
  iadd r6.w, r6.w, r7.x
  store_structured g0.x, l(0), r2.x, r6.w
  sync_g_t
  ld_structured r6.w, l(0), r2.x, g0.xxxx
  ld_structured r7.x, l(0), r5.x, g0.xxxx
  and r7.x, r2.y, r7.x
  iadd r6.w, r6.w, r7.x
  store_structured g0.x, l(1), r2.x, r6.w
  sync_g_t
  ld_structured r6.w, l(1), r2.x, g0.xxxx
  ld_structured r7.x, l(1), r5.y, g0.xxxx
  and r7.x, r2.z, r7.x
  iadd r6.w, r6.w, r7.x
  store_structured g0.x, l(0), r2.x, r6.w
  sync_g_t

#line 90
  ld_structured r6.w, l(0), l(252), g0.xxxx  // r6.w <- nTotal
  ld_structured r7.x, l(0), r2.x, g0.xxxx
  iadd r7.x, r5.w, r7.x

#line 213
  iadd r7.x, r7.x, l(-1)  // r7.x <- nDest
  ult r7.y, r7.x, l(1024)
  and r6.z, r6.z, r7.y
  if_nz r6.z
    iadd r6.z, r0.x, r7.x
    store_structured u0.x, r6.z, l(0), r6.y
  endif
  iadd r6.y, r5.w, r6.w
  umin r5.w, r6.y, l(1024)
  iadd r6.x, r6.x, l(1)
endloop
if_z vThreadIDInGroupFlattened.x

#line 224
  ishl r0.x, r2.w, l(16)
  iadd r0.z, -r2.w, r5.w
  or r0.x, r0.z, r0.x
  store_structured u0.x, r0.y, l(0), r0.x
endif
ret
// Approximately 213 instruction slots used
