cbuffer cb3 : register(b3)
{
  float4 cb3[2];
}

cbuffer cb2 : register(b2)
{
  float4 cb2[8];
}

cbuffer cb1 : register(b1)
{
  float4 cb1[6];
}

cbuffer cb0 : register(b0)
{
  float4 cb0[8];
}


Texture2D<float4> StereoParams : register(t125);
Texture1D<float4> IniParams : register(t120);

void main( 
  float4 v0 : POSITION0,
  float4 v1 : COLOR0,
  float2 v2 : TEXCOORD0,
  out float4 o0 : SV_POSITION0,
  out float4 o1 : COLOR0,
  out float2 o2 : TEXCOORD0,
  out float p2 : TEXCOORD1,
  out float4 o3 : TEXCOORD2)
{
  float4 r0,r1;
  uint4 bitmask, uiDest;
  float4 fDest;

  r0.xyzw = cb2[1].xyzw * v0.yyyy;
  r0.xyzw = cb2[0].xyzw * v0.xxxx + r0.xyzw;
  r0.xyzw = cb2[2].xyzw * v0.zzzz + r0.xyzw;
  r0.xyzw = cb2[3].xyzw * v0.wwww + r0.xyzw;
  o0.xyzw = r0.xyzw;
float4 stereo = StereoParams.Load(0);
r0.x += stereo.x*(r0.w - stereo.y);
  o1.xyzw = v1.xyzw;
  r0.z = cb3[1].x * r0.z;
  r0.z = -r0.z * r0.z;
  p2.x = exp2(r0.z);
  o2.xy = v2.xy * cb0[7].xy + cb0[7].zw;
  r0.y = cb1[5].x * r0.y;
  r1.xzw = float3(0.5,0.5,0.5) * r0.xwy;
  o3.w = r0.w;
  o3.xy = r1.xw + r1.zz;
  r0.x = cb2[5].z * v0.y;
  r0.x = cb2[4].z * v0.x + r0.x;
  r0.x = cb2[6].z * v0.z + r0.x;
  r0.x = cb2[7].z * v0.w + r0.x;
  o3.z = -r0.x;
  return;
}

/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Original ASM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//
// Generated by Microsoft (R) D3D Shader Disassembler
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// COLOR                    0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 0   xy          2     NONE   float   xy  
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float   xyzw
// COLOR                    0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 0   xy          2     NONE   float   xy  
// TEXCOORD                 1     z         2     NONE   float     z 
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
//
vs_4_0
dcl_constantbuffer cb0[8], immediateIndexed
dcl_constantbuffer cb1[6], immediateIndexed
dcl_constantbuffer cb2[8], immediateIndexed
dcl_constantbuffer cb3[2], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.xyzw
dcl_input v2.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xyzw
dcl_output o2.xy
dcl_output o2.z
dcl_output o3.xyzw
dcl_temps 2
mul r0.xyzw, v0.yyyy, cb2[1].xyzw
mad r0.xyzw, cb2[0].xyzw, v0.xxxx, r0.xyzw
mad r0.xyzw, cb2[2].xyzw, v0.zzzz, r0.xyzw
mad r0.xyzw, cb2[3].xyzw, v0.wwww, r0.xyzw
mov o0.xyzw, r0.xyzw
mov o1.xyzw, v1.xyzw
mul r0.z, r0.z, cb3[1].x
mul r0.z, r0.z, -r0.z
exp o2.z, r0.z
mad o2.xy, v2.xyxx, cb0[7].xyxx, cb0[7].zwzz
mul r0.y, r0.y, cb1[5].x
mul r1.xzw, r0.xxwy, l(0.500000, 0.000000, 0.500000, 0.500000)
mov o3.w, r0.w
add o3.xy, r1.zzzz, r1.xwxx
mul r0.x, v0.y, cb2[5].z
mad r0.x, cb2[4].z, v0.x, r0.x
mad r0.x, cb2[6].z, v0.z, r0.x
mad r0.x, cb2[7].z, v0.w, r0.x
mov o3.z, -r0.x
ret 
// Approximately 0 instruction slots used

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/


/*~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Recompiled ASM ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
//
// Generated by Microsoft (R) HLSL Shader Compiler 9.30.9200.20789
//
//   using 3Dmigoto v1.2.1 on Wed Sep 16 11:13:36 2015
//
//
// Buffer Definitions: 
//
// cbuffer cb3
// {
//
//   float4 cb3[2];                     // Offset:    0 Size:    32
//
// }
//
// cbuffer cb2
// {
//
//   float4 cb2[8];                     // Offset:    0 Size:   128
//
// }
//
// cbuffer cb1
// {
//
//   float4 cb1[6];                     // Offset:    0 Size:    96
//
// }
//
// cbuffer cb0
// {
//
//   float4 cb0[8];                     // Offset:    0 Size:   128
//
// }
//
//
// Resource Bindings:
//
// Name                                 Type  Format         Dim Slot Elements
// ------------------------------ ---------- ------- ----------- ---- --------
// cb0                               cbuffer      NA          NA    0        1
// cb1                               cbuffer      NA          NA    1        1
// cb2                               cbuffer      NA          NA    2        1
// cb3                               cbuffer      NA          NA    3        1
//
//
//
// Input signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// POSITION                 0   xyzw        0     NONE   float   xyzw
// COLOR                    0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 0   xy          2     NONE   float   xy  
//
//
// Output signature:
//
// Name                 Index   Mask Register SysValue  Format   Used
// -------------------- ----- ------ -------- -------- ------- ------
// SV_POSITION              0   xyzw        0      POS   float   xyzw
// COLOR                    0   xyzw        1     NONE   float   xyzw
// TEXCOORD                 0   xy          2     NONE   float   xy  
// TEXCOORD                 1     z         2     NONE   float     z 
// TEXCOORD                 2   xyzw        3     NONE   float   xyzw
//
vs_4_0
dcl_constantbuffer cb3[2], immediateIndexed
dcl_constantbuffer cb2[8], immediateIndexed
dcl_constantbuffer cb1[6], immediateIndexed
dcl_constantbuffer cb0[8], immediateIndexed
dcl_input v0.xyzw
dcl_input v1.xyzw
dcl_input v2.xy
dcl_output_siv o0.xyzw, position
dcl_output o1.xyzw
dcl_output o2.xy
dcl_output o2.z
dcl_output o3.xyzw
dcl_temps 1
mul r0.xyzw, v0.yyyy, cb2[1].xyzw
mad r0.xyzw, cb2[0].xyzw, v0.xxxx, r0.xyzw
mad r0.xyzw, cb2[2].xyzw, v0.zzzz, r0.xyzw
mad r0.xyzw, cb2[3].xwyz, v0.wwww, r0.xwyz
mov o0.xyzw, r0.xzwy
mov o1.xyzw, v1.xyzw
mad o2.xy, v2.xyxx, cb0[7].xyxx, cb0[7].zwzz
mul r0.w, r0.w, cb3[1].x
mul r0.w, r0.w, -r0.w
exp o2.z, r0.w
mul r0.z, r0.z, cb1[5].x
mul r0.xzw, r0.xxyz, l(0.500000, 0.000000, 0.500000, 0.500000)
mov o3.w, r0.y
add o3.xy, r0.zzzz, r0.xwxx
mul r0.x, v0.y, cb2[5].z
mad r0.x, cb2[4].z, v0.x, r0.x
mad r0.x, cb2[6].z, v0.z, r0.x
mad r0.x, cb2[7].z, v0.w, r0.x
mov o3.z, -r0.x
ret 
// Approximately 20 instruction slots used

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~*/
