//
// Generated by Microsoft (R) HLSL Shader Compiler 9.29.952.3111
//
// Parameters:
//
//   float4 MinZ_MaxZRatio;
//   float NvStereoEnabled;
//   sampler2D NvStereoFixTexture;
//   sampler2D PixelTexture2D_0;
//   sampler2D PixelTexture2D_1;
//   sampler2D PixelTexture2D_2;
//   sampler2D SceneColorTexture;
//   float4 ScreenPositionScaleBias;
//   float4 UniformPixelScalars_1;
//   float4 UniformPixelScalars_2;
//   float4 UniformPixelScalars_3;
//   float4 UniformPixelScalars_5;
//   float4 UniformPixelVector_0;
//   float4 UniformPixelVector_1;
//   float4 UniformPixelVector_2;
//   float4 UniformPixelVector_3;
//   float4 UniformPixelVector_4;
//   float4 UniformPixelVector_5;
//   float4 UniformPixelVector_6;
//
//
// Registers:
//
//   Name                    Reg   Size
//   ----------------------- ----- ----
//   UniformPixelVector_0    c0       1
//   ScreenPositionScaleBias c1       1
//   MinZ_MaxZRatio          c2       1
//   NvStereoEnabled         c3       1
//   UniformPixelVector_1    c7       1
//   UniformPixelVector_2    c8       1
//   UniformPixelVector_3    c9       1
//   UniformPixelVector_4    c10      1
//   UniformPixelVector_5    c11      1
//   UniformPixelVector_6    c12      1
//   UniformPixelScalars_1   c13      1
//   UniformPixelScalars_2   c14      1
//   UniformPixelScalars_3   c15      1
//   UniformPixelScalars_5   c16      1
//   SceneColorTexture       s0       1
//   NvStereoFixTexture      s1       1
//   PixelTexture2D_0        s2       1
//   PixelTexture2D_1        s3       1
//   PixelTexture2D_2        s4       1
//

    ps_3_0
    def c4, 7, 6, 0.0625, 0
    def c5, 1, -0.5, 0.0500000007, 0.200000003
    def c6, 13, 12, 2.5, -0.400000006
    def c17, 2, 1.5, 4, 0
    dcl_texcoord4 v0
    dcl_texcoord5 v1.xyw
    dcl_texcoord v2.xy
    dcl_2d s0
    dcl_2d s1
    dcl_2d s2
    dcl_2d s3
    dcl_2d s4
    mov r0.xy, c4
    mad r0.xy, v2, r0, c7
    abs r0.z, c3.x
    if_ne c3.x, -c3.x
      texld r1, c4.zwzw, s1
      add r0.w, -r1.y, v1.w
      mad r1.x, r1.x, r0.w, v1.x
      mov r1.yz, v1.xyww
    else
      mov r1.xyz, c4.w
    endif
    cmp r1.xyz, -r0.z, v1.xyww, r1
    rcp r0.w, r1.z
    mul r1.xy, r0.w, r1
    mad r1.xy, r1, c1, c1.wzzw
    mov r1.zw, c4.w
    texldl r1, r1, s0
    mov r1.x, c5.x
    add r0.w, r1.x, -c2.y
    add r0.w, -r0.w, r1.w
    rcp r0.w, r0.w
    mov r2.x, c2.x
    mad r0.w, -r2.x, r0.w, -c13.y
    rcp r1.y, c13.w
    mul_sat r0.w, r0.w, r1.y
    mad r1.x, c14.x, -r0.w, r1.x
    add r0.xy, r0, r1.x
    texld r1, r0, s2
    mul r0.x, r0.w, r1.x
    mov_sat r0.x, r0.x
    mul r0.x, r0.x, c14.y
    if_ne c3.x, -c3.x
      texld r2, c4.zwzw, s1
      add r0.y, -r2.y, v1.w
      mad r2.x, r2.x, r0.y, v1.x
      mov r2.yz, v1.xyww
    else
      mov r2.xyz, c4.w
    endif
    cmp r2.xyz, -r0.z, v1.xyww, r2
    rcp r0.y, r2.z
    mul r2.xy, r0.y, r2
    mad r2.xy, r2, c1, c1.wzzw
    add r2.zw, r2.xyxy, c5.y
    mad r0.xy, r0.x, r2.zwzw, r2
    texld_pp r2, r0, s0
    mad r0.xyw, r1.xyzz, r0.w, r0.w
    if_ne c3.x, -c3.x
      texld r3, c4.zwzw, s1
      add r1.y, -r3.y, v1.w
      mad r3.x, r3.x, r1.y, v1.x
      mov r3.yz, v1.xyww
    else
      mov r3.xyz, c4.w
    endif
    cmp r1.yzw, -r0.z, v1.xxyw, r3.xxyz
	mov r1.yzw, v1.xxyw
    rcp r1.w, r1.w
    mul r1.yz, r1.w, r1
    mad r1.yz, r1, c1.xxyw, c1.xwzw
    mov r3.x, c15.x
    mad r1.yz, r3.x, r1, c9.xxyw
    texld r3, r1.yzzw, s2
    add r1.y, r3.x, c5.z
    mul r0.xyw, r0, r1.y
    mul r0.xyw, r0, c8.xyzz
    mad r0.xyw, c15.w, r0, r2.xyzz
    mov r2.xy, c6
    mad r1.yz, v2.xxyw, r2.xxyw, c10.xxyw
    mad r1.xy, r1.x, c5.w, r1.yzzw
    texld r1, r1, s3
    mad r0.xyw, r1.x, -c16.z, r0
    if_ne c3.x, -c3.x
      texld r1, c4.zwzw, s1
      add r1.y, -r1.y, v1.w
      mad r1.x, r1.x, r1.y, v1.x
      mov r1.yz, v1.xyww
    else
      mov r1.xyz, c4.w
    endif
    cmp r1.xyz, -r0.z, v1.xyww, r1
    rcp r1.z, r1.z
    mul r1.xy, r1.z, r1
    mad r1.xy, r1, c1, c1.wzzw
    texld_pp r1, r1, s0
    mul r1.xyz, r1, c6.z
    if_ne c3.x, -c3.x
      mov r2.xy, v1.ywzw
    else
      mov r2.xy, c4.w
    endif
    cmp r2.xy, -r0.z, v1.ywzw, r2
    rcp r1.w, r2.y
    mul r1.w, r1.w, r2.x
    mad r1.w, r1.w, c1.y, c1.z
    mov r2.xyz, c11
    add r2.xyz, -r2, c12
    mad r2.xyz, r1.w, r2, c11
    add r2.xyz, r2, -c5.x
    mul r2.xyz, r2, c16.w
    max r3.xyz, r2, c6.w
    min r2.xyz, r3, c17.x
    mul r1.xyz, r1, r2
    if_ne c3.x, -c3.x
      texld r2, c4.zwzw, s1
      add r1.w, -r2.y, v1.w
      mad r2.x, r2.x, r1.w, v1.x
      mov r2.yz, v1.xyww
    else
      mov r2.xyz, c4.w
    endif
    cmp r2.xyz, -r0.z, v1.xyww, r2
    rcp r0.z, r2.z
    mul r2.xy, r0.z, r2
    mad r2.xy, r2, c1, c1.wzzw
    texld r2, r2, s4
    add_sat r0.z, -r2.z, c17.y
    mad r0.xyz, r0.z, r1, r0.xyww
    max r1.xyz, r0, c4.w
    min r0.xyz, r1, c17.z
    add_pp r0.xyz, r0, c0
    mad_pp oC0.xyz, r0, v0.w, v0
    mov_pp oC0.w, c5.x

// approximately 135 instruction slots used (13 texture, 122 arithmetic)
 