Making 3-D Chips a RealityThe semiconductor industry is trying to make 3-D chips for decades now. Now it seems that researchers at the Rensselaer Polytechnic Institute (RPI) have developed a new interconnect technology which might deliver electronic circuits functioning in three dimensions.
Researchers at Rensselaer’s Focus Center-NY for Interconnections for Gigascale Integration believe that a strategy in which several chip wafers are bonded together in 3-D and interconnected provides an effective means to integrate chip technologies. To make and interconnect 3-D chips, Lu explains Rensselaer’s process of effectively bonding wafers together face-to-face. Here is an image of a "processed Si wafer, supplied by SEMATECH, bonded to a glass wafer after the silicon was removed" (Credit: Russ Kraft). Further advancements and benefits of such a system on a 3-D chip are that each layer can be optimized for any given technology, meaning in one 3-D chip you could integrate (hyper-integrate) terahertz technology, mixed signal processing, wireless and optical systems.

Standard processing to make channels inside the metal is to first process two parts separately and then bond them together by solder or thermal diffusion. Lots of chipping in tens of μm can occur on hard glasses such as borosilicate glass when they are drilled or grooved, causing quality problems.
When polishing fragile materials with through-holes, a slope usually occurs around the edge of the hole.
Transparent finish is available on the bottom of the cavities of such glass as borosilicate glass, silica glass, etc. Lots of through holes as small as a square shape with 100 μm of each side can be formed on a hard glass wafer of four to six inch such as borosilicate glass wafer with high precision. After bonding and thinning the top wafer, inter-wafer interconnects are formed using the industry standard "damascene" processing.

However, our seamless microchannels are processed with our original manufacturing method, which results in a completely seamless structure without bonding layers.
Our no chipping glass processing technologies can prevent chipping size less than ten μm when the glass wafers are used with a silicon wafer in the wafer level packaging (WLP) process or diced into elements.
With sharp-edge channels with transparent bottom inside, these products have superior specifications of transparency, chemical resistance and heat resistance because they don’t contain such organic substance as adhesives. This process includes drilling a hole using dry etching, filling it with copper (the industry standard material), and polishing away extra copper define the metal lines that will carry signals around the “stacked-chip” product.

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Comments Bonding glass wafers japan

  1. EPPO
    The glue to the properties body fluids , a healthcare.
  2. RamaniLi_QaQaS
    Been washed, avoid putting it in the dryer.
    Also, we were not able to show to bond 2 pieces together, you would using.